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NOT Gate Astable


This is the AQA version closing after June 2019. Visit the the version for Eduqas instead.

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Non-Exam Extras

A NOT Gate Astable using a Timing Capacitor and Resistor

This circuit can be used to build a clock to drive sequential logic circuits. However the frequency changes when the power supply voltage changes. A 555 Astable has better frequency stability. A quartz Crystal Oscillator gives the best stability. The upper frequency limit is determined by the chip speed. The NOT gate would be the winner here. For low frequencies, you can use an Op Amp as a Relaxation Oscillator.

Period = 2RC

Frequency = 1 / Period

Frequency = 1 / 2RC

The circuit is astable. That means it can not permanently settle in an on or off state. It has ZERO stable states. Whichever state it is in, the capacitor will charge or discharge eventually causing it to switch to the other state. Once in the other state, it is still unstable and the circuit oscillates.

Try the 4069UB unbuffered hex NOT gate from the 4000 CMOS family of chips.

Not-gate-astable.gif

For the Falstad Circuit Simulation, CTRL+Click Astable Using Not Gates
In options, check European Resistors and uncheck Conventional Current.
Turn on the switch to start the astable.

Alternatively view NOT_Gate_Astable.txt.
Save or copy the text on the web page. Import the saved or copied text into the Falstad simulator.

Here is the new HTML5 Simulator Site.

A NOT Gate Astable using an Inductor

Period = 2L / R

Frequency = 1 / Period

Frequency = R / 2L

Astable-Not-Gate-Inductor.gif

For the Falstad Circuit Simulation, CTRL+Click Astable Using Not Gates and an Inductor
In options, check European Resistors and uncheck Conventional Current.
Turn on the switch to start the astable.

Alternatively view NOT_Gate_Inductor_Astable.txt.
Save or copy the text on the web page. Import the saved or copied text into the Falstad simulator.

Here is the new HTML5 Simulator Site.


 

 

 

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