| Extras Non Exam Microcontroller DECF and BTFSS >RLF and RRF< Test Instruction Set |
Microcontroller RLF and RRF |
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RA5 never goes high because it's configured as input-only in the hardware. The TRISA bit can't override this.
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NOP 0x0000 00 0000 0000 0000 00 0000 0xx0 0000 Cycles: 1 Flags: |
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W REG000 0x00 00000000 Bank 0 From 0x00 to 0x7F PCL000 0x00 00000000 STATUS024 0x18 00011000 PORTA000 0x00 00000000 PORTB000 0x00 00000000 INTCON000 0x00 00000000 |
Stack 0000 0000 0000 0000 |
SP000 0x00 00000000 Bank 1 From 0x80 to 0xFF PCL000 0x00 00000000 STATUS024 0x18 00011000 TRISA111 0xFF 11111111 TRISB111 0xFF 11111111 INTCON000 0x00 00000000 |
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Bank 0 General Purpose File Registers from 0x20. |
0x20000 0x00 00000000 0x21000 0x00 00000000 0x22000 0x00 00000000 0x23000 0x00 00000000 |
0000 0000 0000 0000 |
0x24000 0x00 00000000 0x25000 0x00 00000000 0x26000 0x00 00000000 0x27000 0x00 00000000 |
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| 0x | 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | 09 | 0A | 0B | 0C | 0D | 0E | 0F | ||
| 00 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 00 | |
| 10 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 10 | |
| 20 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 20 | |
| 30 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 30 | |
| 40 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 40 | |
| 50 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 50 | |
| 60 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 60 | |
| 70 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 70 | |
| 80 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 80 | |
| 90 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 90 | |
| A0 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | A0 | |
| B0 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | B0 | |
| C0 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | C0 | |
| D0 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | D0 | |
| E0 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | E0 | |
| F0 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | 0000 | F0 | |
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