RANDOM PAGE
SITE SEARCH
LOG
IN
SIGN UP
HELP

Polling and Interrupts - TMR and PRE

This is the AQA version closing after June 2019. Visit the the version for Eduqas instead .

To gain access to revision questions, please sign up and log in.

Polling

Repeatedly reading a data port and testing the input data value.

The processor takes a measurement from a port/sensor at regular time intervals.
This happens, even if there has been no change in the connected device.
Guaranteed or predictable time slices are allocated to each device that is polled.

Polling is ...

simple to code
not very efficient because the polling happens even if the sensor reading has not changed
safe and reliable because the measurements happen at guaranteed time intervals

Interrupts

are hardware or software signals that trigger the interrupt subroutine to run.
only occur when needed.
are more efficient than polling but the timing is less predictable.
more difficult to code than polling.
the interrupt causes ...
- the original process is paused and the return-address is saved onto the stack.
- the interrupt code is run.
- the original process is re-started using the return-address retrieved from the stack.

Timer Interrupts

Most processors have built-in timers which can be used to trigger processes when the timer interval ends.

Simulator Polling Example

CTRL+Click here to run the simulator.

Type in the code below or copy and paste it.
Click the "A" button to assemble the code (translate it into binary).
Click the "S" button to step through the program.
Click the run-faster button to get a middling clock rate.
Click (red highlight) to connect the eight input switches to PORTA.
Watch the value in "W" change as you alter the switches.
Also note the time delay which might be safety critical in some control applications.

INIT:
    MOVW    0xFF       ; IIIIIIII
    MOVWR   TRISA      ; Set eight PORTA
                       ; pins to Input.
START:
    MOVRW   PORTA      ; Read PORTA
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    JMP     START

Simulator Timer Interrupt Example using TMR and PRE

The Timer and Prescaler Registers

The AQA microcontroller contains a timer register called TMR.
This simulator memory-maps this register at address 0xFF.
There is also a prescaler register, PRE, memory-mapped at address 0xFE.
NOTE: In AQA exams, these registers might not be memory mapped.

If PRE contains zero, TMR does nothing.
If PRE contains 10 (for example), on each clock pulse, a counter is incremented. When the counter reaches 10, one is subtracted from TMR and the counter reset to zero. This decrements TMR on every eleventh clock pulse.
If PRE contains some larger number, the counter counts from zero to this larger number and then subtracts one from TMR.
In this way, the clock frequency is divided by PRE + 1 and used to decrement TMR.

When TMR reaches zero, the TMR (T) flag is set and stays set until a non zero value is assigned to TMR.

Timer Example

CTRL+Click here to run the simulator.

Type in the code below or copy and paste it.
Click the "A" button to assemble the code (translate it into binary).
Click the "S" button to step through the program.

Note roughly how long it takes before the code controlled by the timer runs.
Modify this code by storing 8 into PRE instead of 1.
Run the modified code and note that the timer counts far slower and the timer events are less frequent.

START:
; =========================================
;   Initialise PRE and TMR
; =========================================
    MOVW    0X1     ; Copy 1 into ...
    MOVWR   PRE     ; ... the prescaler
    MOVW    0X08    ; Copy 8 into ...
    MOVWR   TMR     ; ... the timer

; =========================================
;   Poll the TMR flag (T)
; =========================================
POLL:
    MOVRW   SR      ; Copy SR into W
    ANDW    0x02    ; Bit mask
    JPZ     POLL

; ==========================================
; == This code runs when TMR reaches zero ==
; ==========================================
    NOP
    NOP
    NOP
    NOP
    JMP     START
; ==========================================