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A latch remembers. It can be set and reset. It is a one bit memory.

• Latches are useful as memory devices.
• These examples also remove switch bounce.
• The bounce is a mechanical problem in the switch.
• Instead of switching cleanly, the switch contacts bounce and turn on and off several times, very quickly before settling.
• These latches operate on the first bounce and ignore any other bounces.
• Note the use of Pull-Up and Pull-Down resistors and switches on the logic inputs.

AND Latch (Debouncer)

• If neither switch is pressed, if the output is high, it will stay high.
• If neither switch is pressed, if the output is low, it will stay low.
• If "Set" is pressed, the output will go high.
• If "Reset" is pressed, the output will go low.

OR Latch (Debouncer)

• If either OR gate input is high the output will be high.
• If the "Set" switch is pressed, that input goes high and so does the output.
• The high output is fed back to the second input so the output will stay high even if the "Set" switch is released.
• To clear the latch, the "Reset" switch must be pressed. Then both inputs will be low.
• When "Reset" is pressed, the output will go low and stay low when the "Reset" switch is released.

D Type Flip Flop Latch (Clock NOT Used)

Normally this chip would be clocked.
In this example the Clock and D input are not used.
The output Q can be set or reset with a high signal from the switches.
This is also a debouncing circuit.