|GCSE Sequential Logic BCD Counting >D Type Flip Flop< D Type Latch Decade Counter Sequencer Up Counter|
Sequential Logic D Type Flip Flop
On the rising edge of the clock pulse, the input ( D ) is copied to the output ( Q ).
At any time, the output can be set low or high with a high pulse on R or S (reset or set).
This is a rising edge triggered D Type Flip Flop.
Here is a clock signal with arrows marking the rising edges.
This timing diagram shows D being copied to Q.
The copy takes place on the exact instant of the rising edge of the clock pulse.
The copy does NOT happen when D changes!
Normally R and S are held low and not used. D is copied to Q on the rising edge of the clock pulse.
It's possible to use this device as a latch. Q and the clock are held low and the output is set or reset with a high pulse on S or R.
Subject Name Level Topic Name Question Heading First Name Last Name Class ID User ID
Q: qNum of last_q Q ID: Question ID Score: num correct/num attempts Date Done
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