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A Level     Microcontroller     >Architecture<     Instruction Set     Memory     ~ BSF and BCF     ~ Call and Return     ~ COMF     ~ Counting     ~ Heater     ~ INCF and BTFSC     ~ INT0IF     ~ LED Matrix     ~ Motor     ~ Stepper Motor    

Microcontroller Architecture


Site for Eduqas/WJEC - Go to the AQA site.

  A Level    Microcontrollers  0 of 92    Question 752    Assembler 1 
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Deadline not set49 of 92    Question 899    Assembler 9 
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Deadline not set50 of 92    Question 596    Bus Architecture 
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Deadline not set51 of 92    Question 534    Bus Architecture 
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Deadline not set52 of 92    Question 630    Bus Architecture 
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Deadline not set53 of 92    Question 631    Bus Architecture 
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Deadline not set54 of 92    Question 632    Bus Architecture 
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Deadline not set55 of 92    Question 633    Bus Architecture 
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Deadline not set57 of 92    Question 1438    Bus Architecture 
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Deadline not set58 of 92    Question 1437    Bus Architecture 
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Deadline not set59 of 92    Question 635    Bus Architecture 
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Deadline not set60 of 92    Question 528    Bus Data Directions 
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Deadline not set61 of 92    Question 531    Bus Read and Write 
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Deadline not set65 of 92    Question 479    Compare Polling with Interrupts 
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Deadline not set66 of 92    Question 533    Identifying Buses 
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Deadline not set67 of 92    Question 529    Identifying Buses 
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Deadline not set68 of 92    Question 527    Identifying Buses 
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Deadline not set69 of 92    Question 670    Latches Connected to BUS 
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Deadline not set70 of 92    Question 669    Latches Connected to BUS 
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Deadline not set71 of 92    Question 725    Microcontroller - Address Bus 
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Deadline not set72 of 92    Question 724    Microcontroller - Advantages 
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Deadline not set74 of 92    Question 387    Microcontroller - Architecture 
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Deadline not set75 of 92    Question 386    Microcontroller - Architecture 
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Deadline not set76 of 92    Question 385    Microcontroller - Architecture 
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Deadline not set77 of 92    Question 719    Microcontroller - Binary 
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Deadline not set78 of 92    Question 727    Microcontroller - Memory 
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Deadline not set79 of 92    Question 728    Microcontroller - Memory 
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Deadline not set80 of 92    Question 721    Microcontroller - Terminology 
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Deadline not set81 of 92    Question 900    Microcontroller - Terminology 
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Deadline not set89 of 92    Question 722    Microcontroller - Terminology 
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Deadline not set90 of 92    Question 1031    Robots and Machines 
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Deadline not set91 of 92    Question 300    Sub-systems 
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Deadline not set92 of 92    Question 310    Sub-systems Recognition 
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Chip Architecture is a description of the inner structure of the chip, its buses, its memory and its special function registers.

PIC16F88 ArchitectureAll the chip internals are connected via shared bus wires.
This greatly simplifies the wiring of the chip.

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