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A Level     Microcontroller     Architecture     Instruction Set     Memory     >~ BSF and BCF<     ~ Call and Return     ~ COMF     ~ Counting     ~ Heater     ~ INCF and BTFSC     ~ INT0IF     ~ LED Matrix     ~ Motor     ~ Stepper Motor    

Microcontroller ~ BSF and BCF


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  A Level    Microcontrollers  0 of 93    Question 752    Assembler 1 
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Deadline not set8 of 93    Question 844    Assembler 2 
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Deadline not set18 of 93    Question 782    Assembler 3 
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Deadline not set19 of 93    Question 783    Assembler 3 
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Deadline not set20 of 93    Question 784    Assembler 3 
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Deadline not set21 of 93    Question 785    Assembler 3 
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Deadline not set22 of 93    Question 848    Assembler 3 
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Deadline not set23 of 93    Question 786    Assembler 4 
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Deadline not set26 of 93    Question 841    Assembler 4 
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Deadline not set27 of 93    Question 849    Assembler 4 
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Deadline not set28 of 93    Question 850    Assembler 5 
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Deadline not set29 of 93    Question 851    Assembler 5 
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Deadline not set30 of 93    Question 852    Assembler 5 
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Deadline not set39 of 93    Question 866    Assembler 6 
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Deadline not set47 of 93    Question 897    Assembler 9 
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Deadline not set48 of 93    Question 898    Assembler 9 
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Deadline not set49 of 93    Question 899    Assembler 9 
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Deadline not set50 of 93    Question 534    Bus Architecture 
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Deadline not set51 of 93    Question 596    Bus Architecture 
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Deadline not set52 of 93    Question 630    Bus Architecture 
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Deadline not set53 of 93    Question 631    Bus Architecture 
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Deadline not set54 of 93    Question 632    Bus Architecture 
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Deadline not set55 of 93    Question 633    Bus Architecture 
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Deadline not set56 of 93    Question 634    Bus Architecture 
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Deadline not set59 of 93    Question 1437    Bus Architecture 
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Deadline not set60 of 93    Question 1438    Bus Architecture 
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Deadline not set61 of 93    Question 528    Bus Data Directions 
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Deadline not set62 of 93    Question 530    Bus Read and Write 
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Deadline not set63 of 93    Question 531    Bus Read and Write 
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Deadline not set64 of 93    Question 532    Bus Width Calculation 
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Deadline not set65 of 93    Question 578    Compare Polling with Interrupts 
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Deadline not set66 of 93    Question 479    Compare Polling with Interrupts 
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Deadline not set67 of 93    Question 527    Identifying Buses 
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Deadline not set68 of 93    Question 529    Identifying Buses 
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Deadline not set69 of 93    Question 533    Identifying Buses 
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Deadline not set70 of 93    Question 669    Latches Connected to BUS 
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Deadline not set71 of 93    Question 670    Latches Connected to BUS 
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Deadline not set72 of 93    Question 725    Microcontroller - Address Bus 
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Deadline not set73 of 93    Question 723    Microcontroller - Advantages 
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Deadline not set75 of 93    Question 385    Microcontroller - Architecture 
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Deadline not set78 of 93    Question 719    Microcontroller - Binary 
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Deadline not set79 of 93    Question 727    Microcontroller - Memory 
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Deadline not set80 of 93    Question 728    Microcontroller - Memory 
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Deadline not set81 of 93    Question 900    Microcontroller - Terminology 
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Deadline not set90 of 93    Question 722    Microcontroller - Terminology 
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Deadline not set91 of 93    Question 1031    Robots and Machines 
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Deadline not set92 of 93    Question 300    Sub-systems 
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Deadline not set93 of 93    Question 310    Sub-systems Recognition 
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Deadline not set  Questions 0 to 93   -->  View All  

TRISA is set to 1111 1110 so bit zero in PORTA is an output.
BSF and BCF are used to toggle the bit on and off. Two NOPs are needed to get a 1:1 mark space ratio.

 NOP     0x0000    00 0000 0000 0000   00 0000 0xx0 0000   Cycles: 1       Flags:             
W REG000 0x00 00000000
 Bank 0    From 0x00 to 0x7F
PCL000 0x00 00000000
STATUS024 0x18 00011000
PORTA000 0x00 00000000
PORTB000 0x00 00000000
INTCON000 0x00 00000000

Stack

0000

0000

0000

0000

SP000 0x00 00000000
 Bank 1    From 0x80 to 0xFF
PCL000 0x00 00000000
STATUS024 0x18 00011000
TRISA111 0xFF 11111111
TRISB111 0xFF 11111111
INTCON000 0x00 00000000
 Bank 0 General Purpose File Registers from 0x20.
0x20000 0x00 00000000
0x21000 0x00 00000000
0x22000 0x00 00000000
0x23000 0x00 00000000

0000

0000

0000

0000

0x24000 0x00 00000000
0x25000 0x00 00000000
0x26000 0x00 00000000
0x27000 0x00 00000000
 0x  00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F     
00 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 00
10 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 10
20 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 20
30 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 30
40 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 40
50 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 50
60 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 60
70 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 70
80 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 80
90 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 90
A0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 A0
B0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 B0
C0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 C0
D0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 D0
E0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 E0
F0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 F0

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